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Atmel /AT91SAM9M11 /DDRSDRC0 /DELAY[1]

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Interpret as DELAY[1]

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https://regviz.com/r/Atmel/AT91SAM9M11/DDRSDRC0/DELAY[1]#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DELAY10DELAY20DELAY30DELAY40DELAY50DELAY60DELAY70DELAY8

Description

DDRSDRC Delay I/O Register

Fields

DELAY1

Delay1…Delay8
DELAY2

Delay1…Delay8
DELAY3

Delay1…Delay8
DELAY4

Delay1…Delay8
DELAY5

Delay1…Delay8
DELAY6

Delay1…Delay8
DELAY7

Delay1…Delay8
DELAY8

Delay1…Delay8

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data